Synchronous dynamic random access memory (SDRAM) is dynamic random access memory (DRAM) that is synchronized with a system bus of a computer system. SDRAM utilizes a synchronous interface, which causes the SDRAM to wait for a clock signal before responding to control inputs, therefore synchronizing the SDRAM with the system bus of the computer system. A data storage area of an SDRAM module is divided into several banks, allowing the SDRAM module to process several memory access commands simultaneously, interleaved among the several banks. The use of the multiple banks allows SDRAM to have higher data access rates than asynchronous DRAM. There are several types (i.e., families) of SDRAM available in the market, including Low Power DDR (LPDDR) (i.e., Mobile DDR) and double data rate synchronous dynamic random access memory (DDR SDRAM). The different types of SDRAM differ from each other in certain respects (e.g., speed, power consumption, and price, among others).
The description above is presented as a general overview of related art in this field and should not be construed as an admission that any of the information it contains constitutes prior art against the present patent application.